/* Generated by Yosys 0.47+135 (git sha1 6f3376cbe, clang++ 18.1.8 -fPIC -O3) */

module compteur_base(clk, reset, ce, raz, count);
  wire [27:0] _0_;
  wire [27:0] _1_;
  wire [27:0] _2_;
  wire _3_;
  wire [27:0] _4_;
  wire _5_;
  input ce;
  wire ce;
  input clk;
  wire clk;
  output [27:0] count;
  wire [27:0] count;
  reg [27:0] count_int;
  input raz;
  wire raz;
  input reset;
  wire reset;
  always @(posedge clk, posedge reset)
    if (reset) count_int <= 28'h0000000;
    else if (_5_) count_int <= _2_;
  assign _5_ = | { raz, ce };
  assign _3_ = count_int == 28'hfffffff;
  assign _4_ = count_int + 28'h0000001;
  assign _0_ = _3_ ? 28'h0000000 : _4_;
  assign _1_ = ce ? _0_ : 28'hxxxxxxx;
  assign _2_ = raz ? 28'h0000000 : _1_;
  assign count = count_int;
endmodule

module icebreaker(CLK, BTN_N, BTN1, BTN2, LED1, LED2, LED3);
  input BTN1;
  wire BTN1;
  input BTN2;
  wire BTN2;
  input BTN_N;
  wire BTN_N;
  input CLK;
  wire CLK;
  output LED1;
  wire LED1;
  output LED2;
  wire LED2;
  output LED3;
  wire LED3;
  wire ce;
  wire [27:0] count;
  wire raz;
  wire reset;
  assign reset = ~ BTN_N;
  compteur_base compteur_base0 (
    .ce(ce),
    .clk(CLK),
    .count(count),
    .raz(raz),
    .reset(reset)
  );
  me me0 (
    .ce(ce),
    .clk(CLK),
    .count(count),
    .led1(LED1),
    .led2(LED2),
    .led3(LED3),
    .raz(raz),
    .reset(reset)
  );
endmodule

module me(clk, reset, count, led1, led2, led3, ce, raz);
  wire _00_;
  wire _01_;
  wire [1:0] _02_;
  wire _03_;
  wire _04_;
  wire [1:0] _05_;
  wire _06_;
  wire _07_;
  wire [1:0] _08_;
  wire _09_;
  wire _10_;
  wire _11_;
  wire _12_;
  wire _13_;
  wire _14_;
  wire _15_;
  wire _16_;
  wire _17_;
  output ce;
  wire ce;
  input clk;
  wire clk;
  input [27:0] count;
  wire [27:0] count;
  reg [1:0] etat_cr;
  wire [1:0] etat_sv;
  output led1;
  wire led1;
  output led2;
  wire led2;
  output led3;
  wire led3;
  output raz;
  wire raz;
  input reset;
  wire reset;
  always @(posedge clk, posedge reset)
    if (reset) etat_cr <= 2'h1;
    else if (_13_) etat_cr <= etat_sv;
  assign _10_ = { _03_, _01_ } != 2'h2;
  assign _11_ = { _06_, _04_ } != 2'h2;
  assign _12_ = { _09_, _07_ } != 2'h2;
  assign _13_ = & { _10_, _11_, _12_ };
  assign _14_ = | { _09_, _06_, _03_ };
  assign _15_ = | { _06_, _03_, _00_ };
  assign _16_ = | { _09_, _03_, _00_ };
  assign _17_ = | { _09_, _06_, _00_ };
  assign _00_ = ! etat_cr;
  assign _01_ = count == 28'h0b71b00;
  assign _02_ = _01_ ? 2'h2 : 2'hx;
  assign _03_ = etat_cr == 2'h1;
  assign _04_ = count == 28'h16e3600;
  assign _05_ = _04_ ? 2'h3 : 2'hx;
  assign _06_ = etat_cr == 2'h2;
  assign _07_ = count == 28'h2255100;
  assign _08_ = _07_ ? 2'h0 : 2'hx;
  assign _09_ = etat_cr == 2'h3;
  function [0:0] \66 ;
    input [0:0] a;
    input [1:0] b;
    input [1:0] s;
    (* parallel_case *)
    casez (s)
      2'b?1:
        \66  = b[0:0];
      2'b1?:
        \66  = b[1:1];
      default:
        \66  = a;
    endcase
  endfunction
  assign led1 = \66 (1'hx, 2'h2, { _03_, _17_ });
  function [0:0] \71 ;
    input [0:0] a;
    input [1:0] b;
    input [1:0] s;
    (* parallel_case *)
    casez (s)
      2'b?1:
        \71  = b[0:0];
      2'b1?:
        \71  = b[1:1];
      default:
        \71  = a;
    endcase
  endfunction
  assign led2 = \71 (1'hx, 2'h2, { _06_, _16_ });
  function [0:0] \76 ;
    input [0:0] a;
    input [1:0] b;
    input [1:0] s;
    (* parallel_case *)
    casez (s)
      2'b?1:
        \76  = b[0:0];
      2'b1?:
        \76  = b[1:1];
      default:
        \76  = a;
    endcase
  endfunction
  assign led3 = \76 (1'hx, 2'h2, { _09_, _15_ });
  function [0:0] \83 ;
    input [0:0] a;
    input [1:0] b;
    input [1:0] s;
    (* parallel_case *)
    casez (s)
      2'b?1:
        \83  = b[0:0];
      2'b1?:
        \83  = b[1:1];
      default:
        \83  = a;
    endcase
  endfunction
  assign ce = \83 (1'hx, 2'h2, { _14_, _00_ });
  function [0:0] \88 ;
    input [0:0] a;
    input [1:0] b;
    input [1:0] s;
    (* parallel_case *)
    casez (s)
      2'b?1:
        \88  = b[0:0];
      2'b1?:
        \88  = b[1:1];
      default:
        \88  = a;
    endcase
  endfunction
  assign raz = \88 (1'hx, 2'h1, { _14_, _00_ });
  function [1:0] \92 ;
    input [1:0] a;
    input [7:0] b;
    input [3:0] s;
    (* parallel_case *)
    casez (s)
      4'b???1:
        \92  = b[1:0];
      4'b??1?:
        \92  = b[3:2];
      4'b?1??:
        \92  = b[5:4];
      4'b1???:
        \92  = b[7:6];
      default:
        \92  = a;
    endcase
  endfunction
  assign etat_sv = \92 (2'hx, { _08_, _05_, _02_, 2'h1 }, { _09_, _06_, _03_, _00_ });
endmodule
